Wednesday, 1 May 2013

Chapter 5: Bus System






A communication pathway connecting two or more devices.

Components of the system bus and attached devices.
  •   Internal and External bus
Internal bus – a bus located strictly within a CPU chip for communication among the components in  a CPU chip.
External bus – outside a CPU chip for connecting the rest of the system components to the CPU.
  • System bus consist of a common set of parallel wires : 
i) Address buses
ii) Data buses
iii) Control buses
  • Bus hierarchy
i) the processor bus (system bus)
ii) the cache bus (backside bus)
iii) the memory bus
iv) the local I/O bus (high speed I/O bus)
v) the standard I/O bus



·         Characteristics of Bus

i) Data and address buses
ii) Bus width
iii) Bus speed
iv) Bus Bandwidth

* For very slow bus, bandwidth = ½ (bus width x bus speed)

·         Performance of a bus

i) Transfer time – amount of time it takes for data to be delivered in a single transaction.
ii) Bandwidth – units of bits per second (bps), measures the capacity of the bus.

  • System Board















·         Bus standards

i) Industry Standard Architecture (ISA) Bus
  - the most common bus in the PC world
ii) Micro Channel Architecture (MCA) Bus
  - MCA also called the Micro Channel bus
iii) Extended Industry Standard Architecture (EISA) bus
  - EISA bus never became widely used and cannot be considered an industry standard.
iv) VESA Local Bus (VLB)
  - the first local bus to gain popularity
v) Peripheral Component Interconnect (PCI) Local Bus
  - most popular local I/O bus
vi) Accelerated Graphics Port (AGP)
  - AGP was develop in response to the trend towards greater and greater performance requirements for video.



·         PCI bus performance – PCI is the highest performance general I/O bus currently used on PCs
i) Burst mode
  - The PCI bus can transfer information in a burst mode where after an initial address is provided multiple sets of data can be transmitted in a row.
ii) Bus mastering
  - PCI supports full bus mastering, which leads to improver performance.
iii) High Bandwidth Options
  - the PCI bus specification version 2.1 calls for expandability to 64 bits and 66 MHz speed.

By Tang Ting Hang

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